FPGA Design Flow: 7 Essential Steps to Implementing a Circuit on an FPGA

What steps should we take to implement our digital design on an FPGA?

The FPGA design flow involves seven crucial steps, and I'll guide you through each one.

Understanding the FPGA Design Flow

As you may recall from our previous videos, an FPGA contains thousands to millions of hardware resources like Lookup Tables (LUTs) and interconnection resources.

These resources allow us to create complex digital circuits.

In simpler terms, by configuring the contents of LUTs and the switch matrices, we can design virtually any type of digital circuit.

You might also remember that we use a Hardware Description Language (HDL) like VHDL or Verilog to describe our digital design in an implementation software for the FPGA.

1- Design Entry

Now, the first step in implementing a digital design is called "design entry."

Design entry involves writing our desired digital design using an HDL, such as VHDL or Verilog, in a text editor.

The choice of text editor isn't critical; you can use the one you're most comfortable with.

This 'design entry' phase is often the most time-consuming part of the implementation process.

The better your grasp of VHDL or Verilog and your understanding of the FPGA's internal structure and resources, the more successful your results will be.

On the other hand, having a solid foundation in digital design principles will help you create optimized circuits.

2- Simulation

The second step is the 'simulation' of the design.

Once you've described your design using an HDL, you need to ensure it functions correctly, and you can do this through simulation.

In a simulation, you typically apply specific inputs to your circuit and expect certain outputs.

By comparing the actual outputs of your designed circuit with your expected outputs, you can determine whether you've implemented the circuit correctly or if there might be a logical error in the design.

3- Design Synthesis

The third step in implementing a digital circuit on an FPGA is one of the most vital phases. It's called 'design synthesis.'

Before we dive into the concept of design synthesis for FPGAs, let's briefly discuss the general idea of synthesis in digital design and implementation.

In simple terms, synthesis in digital implementation refers to converting from a high-level description of hardware to a more detailed, lower-level description.

I'll explain this further using the example you can see in this figure.

In our previous videos, we talked about full adders. These adders have three inputs: A, B, and Carry-in, and two outputs: Sum and Carry-out.

On the left side, you can see the full adder described using two logic functions. This is one level of description.

Now, we can implement this full adder using basic logic gates, as you can see in the middle of the figure.

This is another description of the adder, which is considered a lower-level description compared to the logic expressions.

After that, you're probably aware that we implement each logic gate using a transistor circuit within integrated circuits (ICs).

If we replace each logic gate of this full adder with its equivalent transistor circuit model, we get the transistor circuit you see on the right side.

This circuit essentially represents an adder at an even lower level.

It's a different way to describe the same original adder that we initially showed using logic functions.

So, in summary, we've used three methods to represent the concept of a full adder, and in doing so, we've gone through two stages of synthesis:

The first stage of synthesis involves moving from representing the full adder with logic functions to representing it with logic gates.

The second stage of synthesis takes us from the gate-level description of the full adder to the transistor-level description of it.

Now, let's take a closer look at what synthesis means in the context of FPGAs.

In FPGAs, synthesis involves implementing the digital circuit you've described in a Hardware Description Language using the hardware resources available within the FPGA itself.

Let me break this down using the example of a full adder.

We can describe the full adder using a language like VHDL, as we did in our previous videos.

In the architecture section, we used two assignment statements to describe how the adder works.

These assignments used logic gates such as AND, OR, and XOR to represent the full adder.

However, when it comes to implementing this adder on an FPGA, we need to use the digital resources provided by the FPGA itself.

One of the most critical resources, as we discussed in our video titled What is an FPGA?, is the Lookup Table.

We can use an LUT to realize the Sum output of the adder, as shown below, and another LUT to implement the Carry-out output.

Now, let's move on to the fourth stage known as "placement."

4- Placement

During this stage, we precisely determine where within the FPGA the resources that we used during the synthesis stage will be located to implement our design.

For instance, in our previous example, we used two LUTs to create the full adder.

Suppose the FPGA we're working with has around 4,000 LUTs available for circuit implementation.

During the placement stage, we decide which of these 4000 LUTs will be used to implement our adder.

In the example, you can see that I've highlighted the two specific LUTs in red that we'll use for implementing the adder.

Now, let's move on to the fifth stage, which is the routing stage.

5- Routing

FPGAs are equipped with a vast number of interconnections.

To complete your desired circuit, you'll need to connect these wires appropriately, linking them to LUTs or other components on the FPGA.

In the following figure, you can see that we've established a connection between the two LUTs we used for the adder's implementation using the pre-existing wires (shown in green) within the FPGA.

It's important to note that there can be many different paths to connect these two LUTs, potentially dozens or even hundreds of possibilities.

For instance, we could have used the red path to connect the LUTs.

However, the specific path used for these connections is determined by the routing algorithms used in the implementation software and the criteria set for this task.

One crucial criterion is selecting the shortest path between hardware resources.

We'll delve deeper into this topic in later videos.

6- Configuration File Generation

Now, let's talk about the sixth stage, which involves creating the configuration file.

We've already completed the synthesis, placement, and routing stages in previous steps.

However, the outcomes of these stages need to be transferred to the FPGA in a specific way.

To accomplish this, the results of the synthesis, placement, and routing stages are combined into a file known as a bit file (aka configuration file).

Once this bit file is transferred to the FPGA, it configures the FPGA.

If you're curious about the content of the bit file, essentially, it contains data for configuring the FPGA's Lookup Tables and switch matrices.

Once the file is transferred to the FPGA, the FPGA transforms itself into the circuit that we initially described using the HDL language.

7- FPGA Configuration

Now, let's move on to the last stage of circuit implementation using an FPGA, which is the 'FPGA Configuration.'

As I mentioned earlier, all the results from the previous stages are packaged into a Configuration File.

Now, this file needs to be sent to the FPGA, and that's where a special programmer comes into play.

In the figure below, you can see the design of a programmer, particularly for XILINX products.

This programmer connects to your computer via a USB connection on one end, and on the other end, it connects to the FPGA using the JTag protocol.

The bit file is transferred from your computer to the programmer through the USB connection. Then, the programmer sends this file to the FPGA using the JTag protocol.

At this stage, the FPGA becomes the physical circuit we initially designed using the hardware description language.

It's essentially the moment when your FPGA transforms into the circuit you've had in your mind and described it with an HDL.

A Recap of the FPGA Design Process

Now, let's review the FPGA design flow once again:

In the first stage, you start by entering your design into specialized implementation software using a hardware description language.

In the second stage, you run simulations to check if your design works as expected.

Moving on to the third stage, you perform synthesis, a process where your design gets transformed into a form suitable for FPGA implementation.

Then, there's placement, where you decide where each part of your design should go on the FPGA.

After that, you have routing, which involves connecting different parts of your design using the FPGA's internal wires.

Now, after completing these stages, you compile all the results from synthesis, placement, and routing into a file known as a bit file or configuration file.

Finally, you use a specialized programmer to send this bit file to the FPGA and configure it so that the FPGA becomes the actual circuit you designed.

The good news is that you can manage all of these steps using special implementation software designed for FPGA work.

Every FPGA manufacturer provides specific software to handle all these steps.

For example, XILINX offers two options: ISE software and Vivado software. Depending on the FPGA you're using, you'll need one of these software tools.

With these software tools, you can handle all seven stages of FPGA design without needing any additional software.

Now, you might wonder, with all these stages handled using implementation software, what's your specific role as an FPGA designer?

Your Role as an FPGA Designer

Well, you have four key responsibilities when it comes to digital design and implementation:

1- Writing HDL Code

Your first duty is to write hardware description code, which is done using one of the languages, either VHDL or Verilog.

2- Analyzing Implementation Results

The second step is to review the results from the critical stages of synthesis, placement, and routing.

After each of these stages, the software provides you with detailed reports.

By going through these reports, you can make sure everything is going as planned.

3- Running Simulations

Your next job is simulation.

As I mentioned earlier, after each major step in the design process, you must run simulations to make sure your design functions correctly.

Therefore, simulating your design and comparing its results with your desired outcomes is one of your most important tasks as an FPGA designer.

4- Performing Runtime Tests

Lastly, you need to conduct system testing after configuring the FPGA.

This means that after you've programmed the FPGA and turned it into your desired circuit, you must test your design on the FPGA using the tools provided by the ISE or Vivado software to ensure it operates correctly.