In the last part of this article, we went over the ins and outs of FPGAs and how they allow for the design of various logic circuits using basic digital resources. But what really sets FPGAs apart from processors? In this part, I'll go over the distinctions between FPGAs and processors and break down the pros and cons of each.

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## The Difference Between FPGA and Processors

FPGAs have a key advantage over processors in terms of speed when performing processing and control tasks. They can usually implement a given algorithm much faster than a processor. There are two main reasons why FPGAs can perform high-speed logic and mathematical operations.

Firstly, FPGAs can perform an unlimited number of different operations in parallel. For instance, if various algorithms or even different parts of a particular algorithm do not depend on each other's results, they can be performed simultaneously. This is not possible in processors.

Processors have a CPU with specific commands, and only one command can be executed at a time. To perform an algorithm, it must be programmed with predetermined instructions of the CPU, which will then execute them one by one.

The figure below provides a conceptual illustration of this point. In the figure, the C1 command is meant to be executed on the D1 data, while the C2 command is meant to be executed on the D2 data. In a processor, only one of these commands can be executed on the desired data at any given moment. But in an FPGA, the circuit can be designed in parallel to perform both commands simultaneously on the desired data.

Another reason FPGAs can achieve faster processing speeds is due to the ability to customize designs for each algorithm.

As previously mentioned, a processor developer must implement each algorithm using a limited number of predefined commands for the processor. Thus, they have little flexibility in optimizing the algorithm's execution time, except by redefining different parts of the algorithm with fewer commands.

However, an FPGA designer can create an optimized circuit for each algorithm from the ground up. This means that the digital designer can design and implement a specific and optimized CPU to run each part of the algorithm.

### A Few Disadvantages of FPGAs

One drawback of FPGAs is that implementing complex mathematical algorithms on them may consume a lot of hardware resources. Therefore, sometimes, it may not be practical to implement all processing parts of a system on an FPGA.

As a result, algorithms with low to medium complexity that require high execution speed are typically implemented on FPGAs, while more sophisticated algorithms are implemented on DSP processors.

Another disadvantage of FPGAs compared to processors is that designing and debugging them can be a lengthy process. Debugging FPGA designs is time-consuming and can ultimately increase the overall project's time to market and cost. Therefore, it's essential to carefully divide the processing and control tasks between FPGA and processors in a complex project to avoid any additional time or cost on the project.

### When to Use FPGAs?

When implementing a system, a digital designer must determine which technology to use for each part of the system. Since FPGAs are typically much more expensive than various types of processors, it is not cost-effective to use FPGAs when a processor such as ARM or DSP can be used instead.

Additionally, as previously noted, designing and debugging with FPGAs takes longer than with processors, leading to increased costs. Therefore, it's essential to have a proper standard for selecting implementation technology to save time and money.

### Time Required to Run a Processing Algorithm

To decide whether to use FPGAs or processors, it's important to carefully examine the expected specifications of each system. For instance, FPGAs are often used in real-time systems, which must run processing algorithms and control functions quickly to mimic natural phenomena.

For example, in an active radar system that transmits signals and detects targets using the time it takes for echoes of the transmitted signal to return to the radar, the system must process received signals very rapidly. To implement this system, digital designers must consider the time and amount of hardware resources (computation complexity) required to perform the processing associated with target detection. This question can have different answers, even in similar systems.

In the active radar example, if the signals are transmitted every millisecond, the radar has one millisecond to run the processing and control algorithms required for detection after receiving the echo of any transmission. Therefore, designers must determine whether a processor like AVR or DSP can run the processing algorithm within one millisecond. If not, an FPGA may be necessary.

To analyze larger processing systems, designers use a standard unit called FLOP, or Floating-Point Operation, which indicates how many standard floating-point operations a processing algorithm needs to perform on one set of inputs. For example, computing an N-point FFT algorithm requires Nlog2N floating-point operations. Thus, a 128-point FFT requires 896 floating-point operations.

By calculating the FLOP for different parts of the processing algorithm of a large system, a digital designer can calculate the total number of FLOPs needed. Depending on the requirements of a particular project, it's crucial to determine in what amount of time the processing algorithm should run. Dividing the number of processing operations needed by the time required to run it yields another critical value called FLOPS, or Floating-Point Operation per Second. This value can directly determine which processor is necessary for implementation.

For example, if the 128-point FFT algorithm must run in 100 microseconds, the required FLOPS would be 8.96 million floating-point operations per second. Some applications may require the simultaneous use of multiple DSP processors and FPGA chips to achieve the needed FLOPS.